What does $^ in gnu make mean?

What does $^ in gnu make mean?

I am translating GNU makefile to NMake makefile. I came across such
construction in GNU Makefile:
DEP1 = dependencyA1.c dependencyA1.c
DEP2 = dependencyB1.c dependencyB2.c
libABC.a: $(DEP1) $(DEP2)
$(ARCHIVE) libABC.a $^ #**what this does?**
I quite often write GNU Makefiles, but it is first time I found such
instruction. Could someone more experienced explain what it does?
Thanks in advance, Regards.